• Wenjian YU

• Professor

• Department of Computer Science and Technology

• Joined Department: 2003

• Email:yu-wj@tsinghua.edu.cn

• URL: http://numbda.cs.tsinghua.edu.cn/

• Phone:+86-10-62773440

• Fax:+86-10-62781489

Education background

Bachelor of Computer Science & Technology, Tsinghua University, Beijing, China, 1999;

Master of Computer Science & Technology, Tsinghua University, Beijing, China, 2001;

Ph.D. in Computer Science & Technology, Tsinghua University, Beijing, China, 2003.

Social service

Journal of Computer Aided Design and Computer Graphics: Member of Editorial Board (2010-2012);

ASP-DAC 2005, 2007, 2008: PC Member (2005-2008);

SLIP 2009: PC Member (2009).

Areas of Research Interests/ Research Projects

Computer Aided Design of Integrated Circuit and System

Numerical Algorithm and Software

National Natural Science Foundation of China: Parasitic Extraction of the Lossy Substrate with the Boundary Element Method (2005-2008);

National Natural Science Foundation of China:Research on Full-Chip Extraction Algorithms for Detailed Parasitic Parameters of VLSI Interconnects (2005-2008);

Basic Research Foundation of Tsinghua National Laboratory for Information Science and Technology (TNList): Interconnect Analysis and Algorithm Research for 45nm CMOS Technology and Beyond (2006-2008);

National Major Science & Technology Special Project for the 11th Five-Year Plan: Development of Advanced EDA Tools and Platforms (2008-2010).

Research Status

Since 1999, I have been working on algorithms and software development of interconnect parasitic extraction for VLSI circuits. From 2004 to 2007, I worked on the extraction of substrate coupling parameters for the mixed-signal circuits and impedance extraction. From 2005 to 2008, I visited University of California at San Diego (UCSD) several times and collaborated with Prof. C-K Cheng on the research of interconnect analysis and circuit simulation. My major contributions are as follows.

1. Proposed several fast algorithms for 3-D capacitance extraction based on direct boundary element method. I have directed or co-directed the development of two prototypes-QBEM and HBBEM (with Prof. Zeyi Wang). They have both beenacquired by ICScape Inc. and JEDAT Inc., and become a part of their commercial tools for designing VLSI circuits and LCD. The core algorithm in HBBEM, adopted by IBM Watson Research Center, evolved to be CSurf-a premier 3-D capacitance solver of IBM.

2. Proposed several algorithms of capacitance and resistance extraction, which addresses some issues of nanometer technologies, such as floating dummy fill, multi-via connection, and intra-die random variation. My research in this area was published in IEEE Trans. Computer-Aided Design, IEICE Trans. Electronics, DATE 2008, and DAC 2009. They have drawn attentions from both research and industrial community.

3. Proposed fast and versatile extraction algorithms for both substrate resistances and frequency-dependent parameters, respectively, taking substrate coupling effect in mixed-signal and RF chips into consideration. My research in this area was published in IEEE Trans. Computer-Aided Design.

4. Proposed an accurate eye-diagram prediction algorithm based on the linear system's step response. In collaboration with UCSD researchers, I proposed an optimized flow of passive equalizer for off-chip interconnect design, and a simulation algorithm based on frequency-domain analysis. My research in this area was published in IEEE Trans. Computer-Aided Design, IEICE Trans. Electronics, DAC 2008, and ICCAD 2008.

I am actively involved in academic activities both domestically and internationally, and have been frequently invited to be the TPC member and editor of conferences and journals in the above areas.

Honors And Awards

Natural Science Award by Ministry of Education, Second Class-Basic Research on the Physical-Level Optimization and Verification Problems for VLSI Circuits (2005);

Nominee of 100 Best Doctorial Dissertation Award in China (2005).

Academic Achievement

[1] Ling Zhang, Wenjian Yu, Yulei Zhang, Renshen Wang, Alina Deutsch, George A. Katopis, Daniel M. Dreps, James Buckwalter, Ernest S. Kuh and Chung-Kuan Cheng, "Analysis and optimization of low power passive equalizers for CPU-memory links," IEEE Trans. Advanced Packaging, 2010 (accepted)

[2] Wanping Zhang, Wenjian Yu, Xiang Hu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Nuriyoki Ito, and Chung-Kuan Cheng, "Efficient power network analysis considering multidomain clock gating," IEEE Trans. Computer-Aided Design, 28(9): 1348-1358, 2009.

[3] Shan Zeng, Wenjian Yu, Jin Shi, Xianlong Hong, and Chung-Kuan Cheng, "Efficient partial reluctance extraction for large-scale regular power grid structures," IEICE Trans. on Fundamentals, Vol. E92-A, No.6 pp. 1479-1484, Jun. 2009

[4] Wenjian Yu, Rui Shi, and Chung-Kuan Cheng, "Accurate eye diagram prediction based on step response and its application to low-power equalizer design," IEICE Trans. on Electronics, Vol. E92-C, No.4, pp. 444-452, Apr. 2009

[5] Wenjian Yu, Xiren Wang, Zuochang Ye, and Zeyi Wang, "Efficient extraction of frequency-dependent substrate parasitics using direct boundary element method," IEEE Trans. Computer-Aided Design, 27(8): 1508-1513, 2008

[6] Wenjian Yu, Changhao Yan, and Zeyi Wang, "A mixed surface integral formulation for frequency-dependent inductance calculation of 3D interconnects," Engineering Analysis with Boundary Elements, 2007, 31(10): 812-818

[7] Xiren Wang, Wenjian Yu and Zeyi Wang, "Efficient direct boundary element method for resistance extraction of substrate with arbitrary doping profile," IEEE Trans. Computer-Aided Design, 2006, vol. 25, no. 12, pp. 3035-3042.

[8] Zuochang Ye, Wenjian Yu, and Zhiping Yu, "Efficient 3D capacitance extraction considering lossy substrate with multi-layered Green's function," IEEE Trans. Microwave Theory Tech., 2006, 54(5): 2128-2137

[9] Wenjian Yu, Mengsheng Zhang and Zeyi Wang, "Efficient 3-D extraction of interconnect capacitance considering floating metal-fills with boundary element method," IEEE Trans. Computer-Aided Design, 2006, 25(1): 12-18.

[10] Wenjian Yu, Zeyi Wang and Xianlong Hong, "Preconditioned multi-zone boundary element analysis for fast 3D electric simulation," Engineering Analysis with Boundary Elements, 2004, 28(9): 1035-1044.

[11] Wenjian Yu and Zeyi Wang, "Enhanced QMM-BEM solver for three-dimensional multiple-dielectric capacitance extraction within the finite domain", IEEE Trans. Microwave Theory Tech., 2004, 52(2): 560-566

[12] Taotao Lu, Zeyi Wang and Wenjian Yu, "Hierarchical block boundary-element method (HBBEM): A fast field solver for 3-D capacitance extraction," IEEE Trans. Microwave Theory Tech., Vol. 52, No. 1, pp. 10-19, 2004.

[13] Wenjian Yu, Zeyi Wang and Jiangchun Gu, "Fast capacitance extraction of actual 3-D VLSI interconnects using quasi-multiple medium accelerated BEM," IEEE Trans. Microwave Theory Tech., 2003, 51(1): 109-120

[14] Wenjian Yu, Chao Hu, and Wangyang Zhang, "Variational capacitance extraction of on-chip interconnects based on continuous surface model," in Proc. Design Automation Conference (DAC), San Francisco, CA, USA, July. 2009, pp. 758-763.

[15] Wanping Zhang, Yi Zhu, Wenjian Yu, et al., "Noise minimization during power-up stage for a multi-domain power network," in Proc. IEEE ASP-DAC 2009, Yokohama, Japan, Jan. 2009, pp. 391-396.

[16] Rui Shi, Wenjian Yu, Yi Zhu, Chung-Kuan Cheng, and Ernest S. Kuh, "Efficient and accurate eye diagram prediction for high speed signaling," in Proc. International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, Nov. 2008, pp. 655-661

[17] Ling Zhang, Wenjian Yu, Haikun Zhu, A. Deutsch, G. A. Katopis, D. M. Dreps, E. Kuh, and C.-K. Cheng, "Low power passive equalizer optimization using tritonic step response," in Proc. Design Automation Conference (DAC), Anaheim, CA, USA, Jun. 2008, pp. 570-573.

[18] Wangyang Zhang, Wenjian Yu, Zeyi Wang, Zhiping Yu, Rong Jiang, and Jinjun Xiong, "An efficient method for chip-level statistical capacitance extraction considering process variations with spatial correlation," in Proc. ACM/IEEE Design, Automation & Test in Europe Conference (DATE), Munich, Germany, Mar. 2008, pp. 580-585

[19] Wanping Zhang, Yi Zhu, Wenjian Yu, et. al, "Finding the worst voltage violation in multi-domain clock gated power network," in Proc. ACM/IEEE Design, Automation & Test in Europe Conference (DATE), Munich, Germany, Mar. 2008, pp. 537-540

[20] Fang Gong, Wenjian Yu, Zeyi Wang, Zhiping Yu, Changhao Yan, "Efficient techniques for 3-D impedance extraction using mixed boundary element method," in Proc. IEEE ASP-DAC 2008, Seoul, Korea, Jan. 2008, pp. 158-163.

[21] Xiren Wang, Wenjian Yu, Zeyi Wang, "A new boundary element method for multiple-frequency parameter extraction of lossy substrates," in Proc. IEEE ASP-DAC 2007, Yokohama, Japan, Jan. 2007, pp. 62-67. (best paper candidate)

[22] Changhao Yan, Wenjian Yu, and Zeyi Wang, "A mixed boundary element method for extracting frequency-dependent inductances of 3D interconnects," in Proc. 7th International Symposium on Quality Electronic Design (ISQED), San Jose, CA, USA, Mar. 2006, pp. 709-714. (best paper candidate)

[23] Mengsheng Zhang, Wenjian Yu, Yu Du and Zeyi Wang, "An efficient algorithm for 3-D reluctance extraction considering high frequency effect," in Proc. IEEE ASP-DAC 2006, Yokohama, Japan, Jan. 2006, pp. 521-526.

[24] Xiren Wang, Wenjian Yu, Zeyi Wang, "A new boundary element method for accurate modeling of lossy substrates with arbitrary doping profiles," in Proc. IEEE ASP-DAC 2006, Yokohama, Japan, Jan. 2006, pp. 683-688.

[25] Changhao Yan, Wenjian Yu, Zeyi Wang, "Calculating frequency-dependent inductance of VLSI interconnect by complete multiple reciprocity boundary element method," in Proc. IEEE ASP-DAC 2006, Yokohama, Japan, Jan. 2006, pp. 844-849.

[26] Xiren Wang, Wenjian Yu and Zeyi Wang, "Substrate resistance extraction with direct boundary element method," in Proc. IEEE ASP-DAC 2005, Shanghai, China, Jan. 2005, pp. 208-211.

[27] Wenjian Yu and Zeyi Wang, "An efficient quasi-multiple medium algorithm for the capacitance extraction of actual 3-D VLSI interconnects," in Proc. IEEE ASP-DAC 2001, Yokohama, Japan, Jan. 2001, pp. 366-371. (best paper candidate)

[28] Wenjian Yu and Zeyi Wang, "Capacitance extraction," in Encyclopedia of RF and Microwave Engineering, K. Chang [Eds.] , John Wiley & Sons Inc., 2005.

[29] Chinese version of Interconnect Analysis and Synthesis (by C.-K. Cheng, J. Lillis, S. Lin, N. Chang, John-Wiley & Sons Inc., 2000), Wenjian Yu and Ning Xu [Eds.], Tsinghua Univ. Press, 2008

[30] Chinese version of Numerical Computing with MATLAB (by Cleve B. Moler, SIAM Press, 2004), Wenjian Yu [Eds.], China Machine Press, 2006